Patent Literature 1 describes a two-stage A/D converter for image sensors. Patent Literature 2 describes a one-stage cyclic A/D converter arranged in a column of an image sensor. Patent Literature 3 includes a later-stage parallel A/D converter which obtains a digital value of an upper bit by using a first-stage A/D converter and produces a digital value of a lower bit by D/A-converting the digital value. Patent Literature 4 discloses a parallel A/D converter, a 1-bit-cell-pipeline A/D converter for obtaining a lower bit by A/D-converting the result of subtracting the D/A-converted result of the parallel A/D conversion from an input signal and an adder for determining a digital code corresponding to an analog input signal from the output of the parallel A/D converter and the output of the 1-bit-cell-pipeline A/D converter.
Non Patent Literature 1 describes a cyclic A/D converter. Non Patent Literature 2 describes an SA (Successive Approximation)-A/D converter employed in a CMOS image sensor. Non Patent Literature 3 describes a single-slope A/D converter employed in a CMOS image sensor.